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Chapter 6: VGA Display Port
R
approach provides 4-bit resolution per color, generating 12-bit color, or 4,096 possible
colors. The series resistor, in combination with the 75 Ω termination built into the VGA
cable, ensures that the color signals remain in the VGA-specified 0V to 0.7V range.
The VGA_HSYNC and VGA_VSYNC signals use LVTTL or LVCMOS33 I/O standard
drive levels.
Drive the VGA_R[3:0], VGA_G[3:0], and VGA_B[3:0] signals High or Low to generate the
desired colors. The scaled analog output is generated by a resistor-divider that converts the
FPGA’s digital outputs for an individual color. Each individual color output supports 16
possible values, as described by Equation 6-1 . The three separate controls for red, green,
and blue support a maximum of 12-bit color, or 4,096 values.
COLOR OUT = --------------------------- × COLOR
VGA [ 3:0 ]
15
Equation 6-1
For simplicity, the FPGA application can also treat the VGA port as a three-bit interface by
driving all four color outputs with the same digital value. The corresponding eight basic
Table 6-1:
Example Display Color Codes
VGA_R[3:0]
0000
0000
0000
0000
1111
1111
1111
1111
VGA_G[3:0]
0000
0000
1111
1111
0000
0000
1111
1111
VGA_B[4:0]
0000
1111
0000
1111
0000
1111
0000
1111
Resulting Color
Black
Blue
Green
Cyan
Red
Magenta
Yellow
White
Signal Timing for a 60 Hz, 640x480 VGA Display
VGA signal timing is specified, published, copyrighted, and sold by the Video Electronics
Standards Association (VESA). The following VGA system and timing information is
provided as an example of how the FPGA might drive the VGA monitor in 640 by 480
mode. For more precise information or for information on higher VGA frequencies, refer to
documents available on the VESA website or other electronics websites (see “Related
CRT-based VGA displays use amplitude-modulated, moving electron beams (or cathode
rays) to display information on a phosphor-coated screen. LCDs use an array of switches
that can impose a voltage across a small amount of liquid crystal, thereby changing light
permittivity through the crystal on a pixel-by-pixel basis. Although the following
description is limited to CRT displays, LCDs have evolved to use the same signal timings
as CRT displays. Consequently, the following discussion pertains to both CRTs and LCDs.
Within a CRT display, current waveforms pass through the coils to produce magnetic fields
that deflect electron beams to transverse the display surface in a raster pattern, horizontally
from left to right and vertically from top to bottom. As shown in Figure 6-2 , information is
60
Spartan-3A FPGA Starter Kit Board User Guide
UG330 (v1.3) June 21, 2007
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